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SOUTH KOREA · ENGLISH

MPW prototypes for South Korea chip teams

HHGrace 90/55/40 nm shuttles for fabless, startup and research teams. Start with a plain description of the chip.

English supportNo design files neededWritten quote90 / 55 / 40 nm
Shared silicon wafer and an engineer holding prototype chips
Prototype chips from a shared MPW wafer.

SHORT ANSWER

How does a South Korea team start?

Send the chip function, design stage, rough die area, timing and what you need back. MST replies with the process that fits, the shuttle window and a quote.

FOUR QUESTIONS

What decides your MPW project

01

Application and process fit

Chip function and device needs, not only a node.

02

Design and PDK readiness

Concept, schematic, layout, DRC/LVS or tape-out-ready GDSII.

03

Package and test

Bare die, packaged samples, wafer probe or electrical test.

04

Schedule and quantity

Target window, die area, sample quantity and end use.

Not sure where your design stands?Run the readiness check →
Three chip layouts for different processes

CHECKLISTS

What to send, what to keep

01What to send first
  1. Company, work email and location in South Korea
  2. Chip function and end use
  3. Target node or process family, if known
  4. Design stage: concept, schematic, layout, DRC/LVS or GDSII
  5. Rough die area
  6. Target timing
  7. Bare die, package, wafer probe or test needs
  8. PDK/NDA status
02What not to send
  • GDSII, OASIS, RTL, netlists, source code or PDK files
  • Confidential customer names or circuit details
Start an inquiry
EXAMPLEA good first messageShow example →Hide example ×
South Korea fabless team, mixed-signal control IC.
Node: 55 nm preferred, open to advice.
Stage: schematic done, layout not started.
Need: packaged samples with basic electrical test.
Timing: prototype in H1 2027.
Engineers planning wafer, die, package and test

PUBLIC SOURCE

Where the process data comes from

Node and process information comes from Hua Hong Semiconductor's 2025 annual report. Availability for your design is confirmed in the quote.

Read the 2025 annual report (HKEX) →

FAQ

Common questions

Can we start before GDSII is ready?

Yes. A plain description of function, design stage, die area, timing and package/test needs is enough to start.

Does a 90, 55 or 40 nm label mean a shuttle is available?

Not by itself. Process fit, PDK access, slot and capacity are confirmed in the quote.

What about PDK and NDA access?

Tell us whether you already have access. The quote lists the PDK and NDA steps for your project.

Should we upload design files?

No. Do not send GDSII, OASIS, RTL, netlists, source code or PDK files through the website.

What happens after we send the form?

MST replies by email with the process that fits, the shuttle window and a quote, or asks for what is missing.

NEXT STEP

Ready to start?

Send the details above; MST replies by email.

Published 6 Aug 2026 · MST Singapore