Design and engineering services
Chip design, layout, DRC/LVS, packaging and test planning, SECS/GEM integration and prototype engineering.
What to send
Send a short non-confidential brief: architecture, stage, node or package, and what you need decided.
Goals, limits and application are enough for a first reply.
We reply with price, stock and lead time.
Related services
All services →Packaging, dicing and test
packaging-test-rfqTurn prototype wafers into usable samples: dicing, bare-die handling, QFN/BGA/WLCSP, ceramic or open-cavity packages, wafer probe, packaged test, sockets and load boards, and sample shipment. Send the package target, die size and sample count for a quote.
Price by quoteChip design and layout
chip-design-layout-rfqDesign help before or after an MPW run: analog and mixed-signal blocks, RF and sensor front-ends, small RTL-to-GDS tasks, layout clean-up, DRC/LVS and tapeout checks. Start with goals, block type, node and timing; design files are shared only after an NDA.
Price by quotePrototype shipping and re-spin
prototype-logistics-respinAfter first silicon: sample shipment and export documents, wafer and sample handling, re-spin planning, small engineering lots and the move to the next MPW or a pilot quantity. Tell us the stage, destination and timing for a quote.
Price by quote