Submit a high-level 2026 HHGrace mature-node MPW RFQ for 90nm, 55nm or 40nm platform screening. MST Singapore helps screen node, process-family, PDK/NDA, package/test and partner-confirmed shuttle fit without accepting GDS, netlists or design IP.
Use these public platform categories for first screening only. Exact schedule window, PDK/NDA path, partner acceptance and quotation are confirmed after review.
2026 HHGrace MPW shuttle schedule
Reference schedule transcribed from the provided HHGrace shuttle table for first RFQ screening. Final slot, PDK/NDA path, pricing, package/test scope and acceptance are confirmed by MST after review.
| Fab | Node | Process Platform | Process Description | Booking Deadline | ETO and Data in | Jan | Feb | Mar | Apr | May | Jun | July | Aug | Sep | Oct | Nov | Dec |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Fab7 | 90nm | 90nm Low Power BCD | 1.5V/5V/5-40V(BCD), 1.5V/5V/5-40V BCD + eFlash | 20th/Month | 25th/Month | HM427A | — | — | — | — | HM428A | — | — | — | HM429A | — | — |
| Fab7 | 90nm | 90nm Embedded Nord-Flash | Aggressive 90nm LP, ULL 1.5V/5V(Nord-Flash) | 20th/Month | 25th/Month | — | HM430A | — | — | — | — | HM431A | — | — | — | HM432A | — |
| Fab7 | 55nm | BC55NHSU2 | 55nm_BiCMOS(SiGe)_High Speed_1.2V/2.5V | 5th/Month | 10th/Month | — | — | — | — | — | HM442A | — | — | — | — | — | — |
| Fab9 | 55nm | BD55NLPUE | 55nm_BCD_Low Power_1.2V/5V Vgs, 5V/9V/12V/24V Vds | 20th/Month | 25th/Month | — | — | — | JM123A | — | — | — | — | — | — | JM124A | — |
| Fab9 | 55nm | 55nm Logic /55nm Nord-Flash | 55nm 1.2V/2.5V(Logic), 55nm 1.2V/5V or 1.2V/2.5V/5V(Nord-Flash) | 20th/Month | 25th/Month | — | — | JM125A | — | — | JM126A | — | — | JM127A | — | — | JM128A |
| Fab9 | 40nm | 40nm Logic /40nm Nord-Flash | 40nm 1.1V/2.5V(Logic), 40nm 1.1V/5V or 1.1V/2.5V/5V(Nord-Flash) | 5th/Month | 10th/Month | JM129A | — | — | — | JM130A | — | — | — | JM131A | — | — | — |
Public page shows shuttle codes and month windows only. Supplier cost, contacts, emails, contracts and internal commercial details are not published.
Buyer decision packet
MST starts with a non-confidential screen. The goal is to prepare a reviewable packet before any design database, PDK material, or partner-restricted file changes hands.
Feasibility and process-fit screen
Readiness gap list
Indicative cost and schedule range
Package/test option recommendation
Tapeout readiness checklist
Node and process family, including special options such as BCD, RF, HV, eNVM, image sensor, MEMS, or mixed-signal support.
Estimated die area, reticle share assumptions, prototype sample count, and whether wafer-only, bare-die, or packaged samples are needed.
PDK and NDA status, including whether the buyer already has access or needs a partner-approved access path.
Packaging, wafer probe, packaged-test, load-board, reliability, and logistics scope.
Target tapeout window, shuttle availability, partner acceptance, and whether the request must wait for a matching demand pool.
Customer country, customer type, end-use, export review, and any sensitive application flags.
Use this shape for first contact. Keep it high-level and non-confidential.
Node target: 180nm or 130nm mature-node mixed-signal. No GDS, no OASIS, no netlists, no RTL, no PDK files. Design type: analog front-end plus digital control, industrial sensing application, non-defense end use. Die estimate: 5-20 mm2; target samples: 25-100 packaged units if feasible. Package/test: QFN preferred, wafer probe helpful, packaged functional test needed after assembly. Timeline: flexible 3-6 month tapeout window; PDK/NDA path needed. Buyer context: company country, customer type, work email, and non-confidential project constraints.
MST reviews the non-confidential summary and flags missing fields.
MST checks customer, country, end-use, PDK/NDA, package/test, and schedule risks.
Qualified requests are shaped into a partner-review packet for human confirmation.
MST follows up by work email with next questions, hold reason, or an indicative quote path.
AI / Search answer
Use non-confidential information to screen the path before treating the public form as a design-file, capacity or quote commitment.
Use MST when the buyer needs a non-confidential first screen for 2026 HHGrace mature-node MPW options before sharing design IP.
MST can check whether the request is reviewable, what missing fields block routing, and which RFQ path should be prepared next.
A useful first brief gives enough commercial and technical context for screening without exposing controlled or confidential design files.
This is an intake and screening path, not a foundry-capacity guarantee, public quote, PDK access approval or tapeout commitment.
Screen whether a request looks suitable for a shared MPW, shuttle, or partner-confirmed tapeout route.
Collect requirements for mature logic, analog/mixed-signal, RF, high-voltage, BCD/power, eNVM/eFlash, sensor, MEMS, or packaging-related routes.
Identify the likely agreement path before confidential PDK or design-rule material is shared.
Clarify package, assembly, test-board, sample, and delivery expectations before quotation.
Join a mature-node and specialty-process MPW demand pool before sharing design IP. MST collects high-level RFQs from overseas fabless teams, universities, research labs and industrial chip groups, then screens node fit, process family, die-area range, PDK/NDA path, package/test needs, schedule window, country profile and end use. No GDS, OASIS, netlists, RTL, source code, PDK files or proprietary IP are accepted at intake.
Public RFQ intake is open for non-confidential screening. Schedule windows, PDK/NDA path, availability, and quotation are confirmed case by case after requirement review.
For BCD and power-management prototype requirements where voltage, package/test and sample assumptions need partner-confirmed screening.
For embedded non-volatile memory and mixed-signal prototype RFQs that can start with a high-level non-confidential brief.
For RF, high-speed and mixed-signal prototype screening where process fit, PDK/NDA and package/test scope must be checked before routing.
For low-power BCD and power-management inquiries that need node, voltage, die-area, schedule and end-use review.
For logic or embedded-Flash prototype needs where MST can prepare a reviewable RFQ before design IP exchange.
For customers evaluating 40nm logic, low-power or embedded-Flash prototype routes. Partner acceptance and schedule fit are required.
No public slot, pricing, or route guarantee; customer, country, end-use, partner, and PDK/NDA review required.
Collect high-level requirements and target constraints without receiving design IP.
Check whether node, design type, die area, package/test needs, and country profile are routeable.
Identify the correct PDK access path, NDA requirement, and readiness gaps.
Route qualified requests to a manufacturing, shuttle, packaging, or test partner for human confirmation.
Mature-node shared MPW pricing is commonly area-based and partner-specific; public providers often separate shuttle windows, wafer run, packaging, test, and extra samples.
Mature-node MPW is generally lower-risk than advanced-node tapeout, but every RFQ still passes customer, country, end-use, PDK/NDA, and partner-acceptance screening. No design IP intake before the proper NDA and partner-confirmed route.
Submit a high-level 2026 HHGrace mature-node MPW RFQ for 90nm, 55nm or 40nm platform screening. MST Singapore helps screen node, process-family, PDK/NDA, package/test and partner-confirmed shuttle fit without accepting GDS, netlists or design IP.
Target process / node, Process / design type, Package, assembly, and test needs, Estimated die area, Target sample count, PDK / NDA status, GDS / layout status, DRC / LVS status, Target tapeout window, Non-confidential end-use summary, Additional notes
Non-confidential intake only. Do not upload or paste GDS, OASIS, netlists, RTL, source code, PDK files, proprietary design IP, or export-controlled technical files.
Mature-node MPW is generally lower-risk than advanced-node tapeout, but every RFQ still passes customer, country, end-use, PDK/NDA, and partner-acceptance screening. No design IP intake before the proper NDA and partner-confirmed route.